Lab Course: Verification of Digital Circuits - Wintersemester 24 / 25
Übersicht
| Beschreibung |
Many modern products are based on microelectronic components. The correct functioning of these products is essential, e. g., in medicine technology or automotive systems. For this reason, strict requirements on the quality of the applied microelectronic systems are imposed. One important requirement is that the system has to be designed correctly according to its specification. To assert this, verification and validation methods play a central role. The focus of the lab course on verification and validation methods for digital systems. This lab course is intended to complement the specialization course "Verification of Digital Circuits" by applying the techniques from the course in practice. Students will use the tool OneSpin360 (R) by Siemens EDA in order to prove correctness of and find bugs in - Combinational Equivalence Checking - Sequential Equivalence Checking - Property Checking Students will use the tool to locate (and fix) bugs which are present in designs implemented in a hardware description language like VHDL or Verilog. The major part of the tasks will be completed at home. There will however be weekly meetings in our lab (room 00-022 in building 051) with additional kick-off lectures. We strongly recommend that the participating students have already attended and sucessfully finished the "Verification of Digital Circuits" course. Summary: ~8 homework assignments, weekly meetings for Q&A, and at least three kick-off lectures |
| Kommentar |
Lab course, Master ESE / Computer Science, 6 ECTS Link to ILIAS course Materials First meeting will be on Oct 14, 14:00h in 00..022 in building 051. |